1. Technical Field of the Invention
This invention relates generally to integrated circuit design and packaging; and more particularly to input/input output connections for packaged integrated circuits.
2. Description of Related Art
The manufacture, packaging, and use of integrated circuits is generally known. A manufacturing process within a fabricating facility is used to form a unit number of integrated circuits on a single semiconductive substrate. After formation, the semiconductive substrate is divided into the unit number of integrated circuits, i.e., dies. The dies are then packaged. The package provides protection for the integrated circuit die and provides electrical connections between the integrated circuits formed on the die and package pads. The packaged dies are then usually mounted upon printed circuit boards (PCBs) and installed into host devices. The PCBs include conductors that communicatively couple the circuits of the integrated circuit with circuits of other integrated circuits, with PCB connectors, and with user interface devices, etc. As manufacturing process dimensions continue to decrease, larger numbers of circuits are formed on ever-smaller dies. In order to reduce the overall size of the PCBs upon which the packaged dies are mounted, packages having reduced dimensions have been developed. One type of integrated circuit package is referred to as a “wafer-level package. With a wafer-level package, the size of the package is substantially the same as the size of the die contained within. In one particular type of wafer-level package, package surface located package signal connections, e.g., bumps/balls/pads of the wafer-level package serve as the electrical interface between the electrical connections of the package and the PCB upon which it mounts and/or other circuitry.
The bumps/balls/pad placed on the top metal layer of the integrated circuit provides the means of electrical connection between the integrated circuit input output circuitry and off-chip components, e.g., a package substrate and/or PCB circuitry. However, as integrated circuit area decreases, input/output density increases, the density of input/output bumps/balls/pads arrays increases. With a denser I/O bump/ball/pad array, it is more difficult to eliminate bump/ball/pad overlap with underlying critical circuitry, causing unavoidable interference that affects proper device operation. Thus, a need exists for wafer-level packaging that satisfies the circuit requirements of the integrated circuits formed on the die.